8 (B *Marvell PXA168 Aspenite Development Board!!mrvl,pxa168-aspenitemrvl,pxa168chosenz,console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:onaliases 5/soc/apb@d4000000/uart@d4017000 =/soc/apb@d4000000/uart@d4018000 E/soc/apb@d4000000/uart@d4026000M/soc/apb@d4000000/i2c@d4011000R/soc/apb@d4000000/i2c@d4025000memoryWmemorycsoc !simple-busgxaxi@d4200000!mrvl,axi-bussimple-busc xinterrupt-controller@d4282000!mrvl,mmp-intcc( @apb@d4000000!mrvl,apb-bussimple-busc xtimer@d4014000!mrvl,mmp-timerc@ uart@d4017000!mrvl,mmp-uartcpGGokayuart@d4018000!mrvl,mmp-uartcHH disableduart@d4026000!mrvl,mmp-uartc`II disabledgpio@d4019000!marvell,mmp-gpioc1@@ gpio_muxxgpio@d4019000cgpio@d4019004cgpio@d4019008cgpio@d4019100ci2c@d4011000!mrvl,mmp-twsic<< okayi2c@d4025000!mrvl,mmp-twsicP:== disabledrtc@d4010000 !mrvl,mmp-rtccrtc 1Hzrtc alarmBBokayclocks!marvell,pxa168-clockc((Pmpmuapmuapbc(5 #address-cells#size-cellsmodelcompatiblebootargsserial0serial1serial2i2c0i2c1device_typereginterrupt-parentrangesinterrupt-controller#interrupt-cellsmrvl,intc-nr-irqsphandleinterruptsclocksresetsstatusgpio-controller#gpio-cellsinterrupt-namesmrvl,i2c-fast-modereg-names#clock-cells#reset-cells